{"id":275,"date":"2020-08-18T19:23:47","date_gmt":"2020-08-18T20:23:47","guid":{"rendered":"http:\/\/www.linux-tutorial.info\/?page_id=77"},"modified":"2020-08-22T19:26:18","modified_gmt":"2020-08-22T20:26:18","slug":"this-is-the-page-title-toplevel-110","status":"publish","type":"page","link":"http:\/\/www.linux-tutorial.info\/?page_id=275","title":{"rendered":"RAM"},"content":{"rendered":"\nRAM<\/title>\n<p>\nA computer stores the data it works with in three ways, often referred to as\nmemory. Long-term memory, which remains in the system even when there is no\npower, is called non-volatile memory and exists in such places as hard disks or\nfloppies, which are often referred to as secondary storage. Short-term memory,\nor volatile memory, is stored in memory chips called <glossary>RAM<\/glossary>\n(random-access memory).\nRAM is often referred to as primary storage. The third class of memory is often\nignored, or at least not often thought of. This type of memory exists in hardware\non the system but does <em>not <\/em>disappear when power is turned off. This is\ncalled <glossary>ROM<\/glossary>, or read-only memory.\n<\/p>\n<p>\nTypically ROM is set by the motherboard manufacturer and contains the most essential\ninformation to start your computer and provide very basic access to your hardware like\nyour <glossary>floppy<\/glossary> or <glossary>IDE<\/glossary> <glossary>hard disk<\/glossary>\n(This is your system <glossary>BIOS<\/glossary>)\n. Normally there is no need to change it\n(therefore, “read-only) but when problems are discovered the manufacturer might provide you\na disk with a ROM update, which actually rewrites portions of your ROM .\n<\/p>\n<p>\nI need to clarify one thing before we go on. Read-only memory is, as it\nsays, read-only. For the most part, you cannot write to it. However, like\nrandom-access memory, the locations within it can be accessed in a\n“random” order, that is, at the discretion of the programmer. Also,\nread-only memory isn’t always read-only, but that’s a different story that goes\nbeyond the scope of this book.\n<\/p>\n<p>\nThe best way to refer to memory to keep things clear (at least the best way\nin my opinion) is to refer to the memory we traditional call <glossary>RAM<\/glossary>\nas\n“main” memory. This is where our programs and the operating system\nactually reside.\n<\/p>\n<p>\nThere are two broad classes of memory: Dynamic <glossary>RAM<\/glossary>,\n or <glossary>DRAM<\/glossary> (pronounced\ndee-ram), and Static <glossary>RAM<\/glossary>,\n or <glossary>SRAM<\/glossary>\n(pronounced es-ram). <glossary>DRAM<\/glossary>\nis composed of tiny\ncapacitors that can hold their charge only a short while before they require a\n“boost.” <glossary>SRAM<\/glossary> is static because it does not require an extra power\nsupply to keep its charge. As a result of the way it works internally, <glossary>SRAM<\/glossary>\nis faster and more expensive than <glossary>DRAM<\/glossary>.\nBecause of the cost, the <glossary>RAM<\/glossary> that composes\nmain memory is typically <glossary>DRAM<\/glossary>.\n<\/p>\n<p>\nDRAM chips hold memory in ranges of 64KiB to 16MiB and more. In older systems, individual <glossary>DRAM<\/glossary>\nchips were laid out in parallel rows called banks. The chips themselves were called DIPPs, for Dual\nIn-Line Pin Package. These look like the average, run-of-the-mill computer chip, with two rows of\nparallel pins, one row on each side of the chip. If memory ever went bad in one of these banks, it\nwas usually necessary to replace (or test) dozens of individual chips. Because the maximum for most\nof these chips was 256 kilobits (32KiB), it took 32 of them for each megabyte!\n<\/p>\n<p>\nOn newer systems, the <glossary>DIPP<\/glossary>\nchips have been replaced by Single In-Line Memory\nModules, or SIMMs. Technological advances have decreased the size considerably.\nWhereas a few years ago, you needed an area the size of standard piece of binder\npaper to hold just a few megabytes, todays SIMMs can squeeze twice as much into\nan area the size of a stick of gum.\n<\/p>\n<p>\nSIMMs come in powers of 2 megabytes (128MiB, 256MiB, 512MiB etc.,) and are generally arranged in\nbanks of four or eight. Because of the way the memory is accessed, you sometimes cannot mix sizes. That is, if you have two 128MiB SIMMs, you cannot simply add an 256MIB <glossary>SIMM<\/glossary>\nto get 512MiB. Bear this in mind when you order your system or order more memory.\nYou should first check the documentation that came with the motherboard or the manufacturer.\n<\/p>\n<p>\nMany hardware salespeople are not aware of this distinction. Therefore, if you order a system\nwith 512MiB that’s “expandable” to 2GiB, you may be in for a big surprise. True, there are four\nslots that <em>can<\/em> contain 512MiB each. However, if the vendor fills all four slots with\n128MiB SIMMs to\ngive you your 512MiB, you may have to throw <i>everything<\/i> out if you ever want to increase your\n<glossary>RAM<\/glossary>.\n<\/p>\n<p>\nAnother issue that you should consider with SIMMs is that the motherboard design may require you\nto put in memory in multiples of either two or four because this is the way the motherboard\naccesses that memory. Potentially, a 32-bit machine could read a byte from four SIMMs at once,\nessentially reading the full 32 bits in one read. Keep in mind that the 32 bits are probably not\nbeing read simultaneously. However, being able to read them in succession is faster that reading one\nbank and then waiting for it to reset.\n<\/p>\n<p>\nEven so, this requires special circuitry for each of the slots, called <glossary>address<\/glossary>\n<glossary>decode<\/glossary>\nlogic. The address decode logic receives a memory address from the <glossary>CPU<\/glossary>\nand determines which <glossary>SIMM<\/glossary>\nit’s in and where it is on the SIMM. In other words, it decodes the address to determine which SIMM\nis needed for a particular physical address.\n<\/p>\n<p>\nThis extra circuitry makes the machine more expensive because this is not just an issue with the\nmemory but with the motherboard design as well. Accessing memory in this fashion is called “page\nmode” because the memory is broken into sets of bytes, or pages. Because the\n<glossary>address<\/glossary> <glossary>decode<\/glossary> logic is designed to access memory in only\none way, the memory that is installed must fit the way it is read. For example, my motherboard\nrequires each bank to be either completely filled or completely empty. Now, this requires a little\nbit of explanation.\n<\/p>\n<p>\nAs I mentioned earlier, <glossary>DRAM<\/glossary>\nconsists of little capacitors for each bit of information. If the capacitor is charged, then the bit\nis 1; if there is no charge, the bit is 0. Capacitors have a tendency to drain over time, and for\ncapacitors this small, that time is <i>very <\/i>short. Therefore, they must be regularly (or\ndynamically) recharged.\n<\/p>\n<p>\nWhen a memory location is read, there must be some way of determining whether there is a charge\nin the capacitor. The only way to do that is to discharge the capacitor. If the capacitor can be\ndischarged, that means that there was a charge to begin with and the system knows the bit was 1.\nOnce discharged, internal circuitry recharges the capacitor.\n<\/p>\n<p>\nNow, assume that the system wanted to read two consecutive bytes from a single <glossary>SIMM<\/glossary>.\n Because there is no practical way for the <glossary>address<\/glossary>\n<glossary>decode<\/glossary>\nlogic to tell that the second read is not just a re-read of the first byte, the system must wait\nuntil the first byte has recharged itself. Only then can the second byte be read.\n<\/p>\n<p>\nBy taking advantage of the fact that programs run sequential and rarely read the same byte more\nthan once at any given time, the memory subsystem can interleave its reads. That is, while the\nfirst bank is recharging, it can be reading from the second, and while the second is recharging, it\ncan be reading from the third, and so on. Because subsequent reads must wait until the previous read\nhas completed, this method is obviously not as fast as simultaneous reads. This is referred to as\n“interleaved” or “banked” memory.\n<\/p>\n<p>\n<img decoding=\"async\" src=\"simm.png\" width=213 height=196 border=0>\n<p>\nFigure -9 Comparison of 30-pin and 72-pin SIMMs\n<\/p>\n<p>\nBecause all of these issues are motherboard-dependent, it best to check the hardware\ndocumentation when you change or add memory. Additionally, you may need to adjust settings, or\njumpers, on the motherboard to tell it how much <glossary>RAM<\/glossary> you have and in what\nconfiguration.\n<\/p>\n<p>\nAnother issue that addresses speed is the physical layout of the <glossary>SIMM<\/glossary>.\nSIMMs are often described as being arranged in a “by-9” or “by-36” configuration, which refers to\nthe n umber of bits that are immediately accessible. So, in a “by-9” configuration, 9 bits are\nimmediately accessible, with 1 bit used or <glossary>parity<\/glossary>. In a “by-36”\nconfiguration, 36 bits are available with 4 bits for parity (one for each 8 bits). The “by-9”\nconfiguration comes on SIMMs with 30 pins, where the “by-36” configuration comes on SIMMs with 72\npins. The 72-pin SIMMs can read 32 bits <em>simultaneously<\/em>, so they are even faster than 30-pin\nSIMMs at the same speed. Figure 0-9 shows give you a comparison of the older SIMMs and PS\/2\nSIMMs.\n<\/p>\n<p>\nThere are also different physical sizes for the <glossary>SIMM<\/glossary>.\n The 30-pin SIMMs are\nslightly smaller than 72-pin SIMMs. The larger, 72-pin variety are called PS\/2\nSIMMs because they are used in IBMs PS\/2 machines. As well as being slightly\nlarger, the PS\/2 <glossary>SIMM<\/glossary>\nhas a notch in the center so it is impossible to mix up\nthe two. In both cases, there is a notch on one end that fits into a key in the\nslot on the motherboard, which makes putting the <glossary>SIMM<\/glossary>\nin backward almost\nimpossible.\n<\/p>\n<p>\nSIMMs come in several different speeds. The most common today are between 60\nand 80 nanoseconds. Although there is usually no harm in mixing speeds, there is\nlittle to be gained. However, I want to emphasize the word <i>usually<\/i>.\nMixing speeds has been known to cause panics. Therefore, if you mix speeds, it\nis best keep all the SIMMS within a single bank at a single speed. If your\nmachine does not have multiple banks, then it is best not to mix speeds. Even if\nyou do, remember that the system is only as fast as its slowest component.\n<\/p>\n<p>\nRecently, the computer industry has begun to shift away from the old SIMMs\ntoward extended data out <glossary>RAM<\/glossary>\nor EDORAM. Although as of this writing, EDORAM is\nstill more expensive than <glossary>SIMM<\/glossary>,\n it is expected that by early 1997, the demand\nfor EDORAM will be such that the price difference will disappear.\n<\/p>\n<p>\nThe principle behind EDORAM is an extension of the fast-page-mode (FPM) <glossary>RAM<\/glossary>.\nWith FPM <glossary>RAM<\/glossary>,\n you rely on the fact that memory is generally read sequentially.\nBecause you don’t really need to wait for each memory location to recharge\nitself, you can read the next location without waiting. Because you have to wait\nuntil the <glossary>signal<\/glossary>\nis stabilized, though, there is still some wait, though it is\nmuch less of a wait than waiting for the memory to recharge. At higher <glossary>CPU<\/glossary>\nspeeds, the <glossary>CPU<\/glossary>\nrequests memory faster than memory can deliver it,\nand the <glossary>CPU<\/glossary>\nneeds to wait.\n<\/p>\n<p>\nEDORAM works by “latching” the memory, which means adding\nsecondary memory cells. These detect the data being read from memory and store\nthe signals so the <glossary>CPU<\/glossary> can retrieve it. This works at\n<glossary>bus<\/glossary> speeds of 66Mhz. This\nprocess can be made even faster by including “burst” EDORAM, which\nextends the <glossary>locality principle<\/glossary>\neven further. Because the system is going to read\nsequentially, why doesn’t it anticipate the processor and read more than just\nthat single location? In some cases, the system will read 128 bits at once.\n<\/p>\n<p>\nPart of the reason why EDORAM hasn’t simply taken over the market is the\nsimilar to the reason why PS\/2 didn’t take over standard SIMMs: the hardware\nneeded to support them is different. You cannot just install EDORAM in your\nmachine and expect it to work. You need a special chip set on your motherboard.\nOne such chip set is the Intel Triton chip set.\n<\/p>\n<p>\nA newer memory type are the dual in-line memory modules or DIMMs. These\nlook similar to the <glossary>SIMM<\/glossary>,\n but are generally larger. One key difference is that\nalthough both SIMMs and DIMMs have contacts on both sides of the board, the pins\non opposite sides of the DIMMs are electrically isolated from each other, which\ncreates two separate contacts. In addition, unlike SIMMs, you do not need to\nhave pairs of DIMMS in your machine.\n","protected":false},"excerpt":{"rendered":"<p>RAM A computer stores the data it works with in three ways, often referred to as memory. Long-term memory, which remains in the system even when there is no power, is called non-volatile memory and exists in such places as … <a href=\"http:\/\/www.linux-tutorial.info\/?page_id=275\">Continue reading <span class=\"meta-nav\">→<\/span><\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-275","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"http:\/\/www.linux-tutorial.info\/index.php?rest_route=\/wp\/v2\/pages\/275","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/www.linux-tutorial.info\/index.php?rest_route=\/wp\/v2\/pages"}],"about":[{"href":"http:\/\/www.linux-tutorial.info\/index.php?rest_route=\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"http:\/\/www.linux-tutorial.info\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/www.linux-tutorial.info\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=275"}],"version-history":[{"count":1,"href":"http:\/\/www.linux-tutorial.info\/index.php?rest_route=\/wp\/v2\/pages\/275\/revisions"}],"predecessor-version":[{"id":675,"href":"http:\/\/www.linux-tutorial.info\/index.php?rest_route=\/wp\/v2\/pages\/275\/revisions\/675"}],"wp:attachment":[{"href":"http:\/\/www.linux-tutorial.info\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=275"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}